As the Physical limit is approaching in the miniaturization process of CMOS electronic devices, various size-related problems such as high-power leakage, low-reliability, and thermal effects, are motivating to look for alternate nanodevices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors, metal-insulator-metal (MIM) capacitors, junction and doping free transistors, nanoscale gigh-k/metal-gate CMOS and FinFET based logic libraries. These emerging devices could replace the traditional and ubiquitous silicon transistor, but their design, fabrication and modelling possess another big challenge to the researcher and industries. Nano-Scale CMOS analog/digital VLSI Circuits, Models and CAD Techniques for High-Level Design need to be updated timely for designing the circuits with optimal performances.  MNDC-2024 will provide a plateform to academcians, researchers and technocrates to dwell deep into the most recent innovations, trends, concerns, and practical challenges encountered as well as solutions adopted in the fields of Micro/Nanoelectronics devices, semiconductor fabrication Technologies, CAD Tools and Design of CMOS Circuits.